Xilinx is hiring Simulation Research Engineer Across India.
Company Name: Xilinx
Job Position: Junior ESL-Simulation Research Engineer
Educational Qualification: B.E/B.Tech
Experience: 0-2 Years
Job Location: Across India
Candidate Profile:
- Bachelor degree in engineering or basic sciences with good written and oral communication skills in relevant field with 0-2 years of experience.
- Should be strong in C++ & SystemC.
- Should be above average in VHDL or Verilog.
- Experience of TLM and AXI bus protocols and Mixed language simulation.
Job Description:
- Assist senior members of the team in contribution to architecture, design, execution and quality of the product through major initiatives driven in ESL simulation team.
- The candidate will prototype and productize innovative concepts to speed up System Level Simulation by several orders of magnitude.
- Will also be execution hand to senior members of the team in developing integration modules with cross-geographic teams such as Vivado IP Integrator, Vivado HLS, Vivado System Generator, IP and Simulation teams besides playing key role in idea sales and technology change management programmes.
- Responsible for addition of new System Level Simulation features to Vivado tool-suite.
- Integrate VHDL/Verilog and C++ simulation models and development of integration tools and simulation solutions
How to Apply:
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